X-Git-Url: http://git.tdb.fi/?a=blobdiff_plain;f=common%2Ftimer.c;fp=common%2Ftimer.c;h=99625f8c2abd4b6df8ca0dd552b760499d09bf6e;hb=9c37d18b9c70fdb70dfec453398c4649e9e57586;hp=0000000000000000000000000000000000000000;hpb=49b6b6ad84ec47b4f9eb9ef131975cc5b72372a2;p=model-railway-devices.git diff --git a/common/timer.c b/common/timer.c new file mode 100644 index 0000000..99625f8 --- /dev/null +++ b/common/timer.c @@ -0,0 +1,101 @@ +#include +#include "timer.h" + +#define BIT(n) (1<<(n)) + +static void timer_start(uint8_t num, uint32_t period) +{ + uint8_t cs; + + if(num==0) + { + if(period<0x100) + { + cs = BIT(CS00); + } + else if(period<0x800) + { + cs = BIT(CS01); + period /= 8; + } + else if(period<0x4000) + { + cs = BIT(CS01) | BIT(CS00); + period /= 64; + } + else if(period<0x10000) + { + cs = BIT(CS02); + period /= 256; + } + else + { + cs = BIT(CS02) | BIT(CS00); + period /= 1024; + if(period>0xFF) + period = 0xFF; + } + TCCR0A = BIT(WGM01); + TCCR0B = cs; + OCR0A = period; + TIMSK0 = BIT(OCIE0A); + } + if(num==1) + { + if(period<0x10000) + { + cs = BIT(CS10); + } + else if(period<0x80000) + { + cs = BIT(CS11); + period /= 8; + } + else if(period<0x400000) + { + cs = BIT(CS11) | BIT(CS10); + period /= 64; + } + else if(period<0x1000000) + { + cs = BIT(CS12); + period /= 256; + } + else + { + cs = BIT(CS12) | BIT(CS10); + period /= 1024; + if(period>0xFFFF) + period = 0xFFFF; + } + TCCR1A = 0; + TCCR1B = BIT(WGM12) | cs; + OCR1AH = period>>8; + OCR1AL = period; + TIMSK1 = BIT(OCIE1A); + } +} + +void timer_start_hz(uint8_t num, uint32_t freq_p, uint8_t freq_q) +{ + timer_start(num, F_CPU*freq_q/freq_p); +} + +void timer_start_us(uint8_t num, uint32_t us) +{ + timer_start(num, F_CPU/1000000*us); +} + +void timer_stop(uint8_t num) +{ + if(num==0) + { + TCCR0B = 0; + TIMSK0 = 0; + } + else if(num==1) + { + TCCR1B = 0; + TIMSK1 = 0; + } +}